Field effect transistors are employed as basic discrete elements in fabricating semiconductor integrated circuit devices. Generally, a field effect transistor is composed of a gate electrode, a source region, and a drain region. The source and drain regions are located in a semiconductor substrate, with the source region separated from the drain region. The gate electrode is positioned over a channel region between the source and the drain regions. In the following specification, ‘field effect transistor’ will hereinafter be referred to as ‘transistor’.
As semiconductor devices become more highly integrated, transistor size may be reduced, which may cause a variety of operational and structural problems. For example, shorter channel length may result in more easily induced punch-through effects between the drain and source regions. Also, controllability of the gate electrode may be reduced, which may result in leakage current between the drain region and the source region when the transistor is turned off. Recently, double-gate transistors have been developed to address the above problems. A double-gate transistor can include two gate electrodes positioned at both sides (both sidewalls and/or top/bottom surfaces) of a channel region thereof. Therefore, the double-gate transistor can effectively control both sides of the channel region.
Fin Field Effect Transistors (hereinafter referred to as ‘Fin FETs’) have also been developed. Fin FETs are a type of double-gate transistor, and are discussed, for example, in U.S. Pat. No. 6,413,802 entitled “Fin FET Transistor Structures Having a Double Gate Channel Extending Vertically From a Substrate And Methods of Manufacture”, to Hu et al.
According to Hu, the Fin FET can include a silicon source region and a silicon drain region, which are separated from each other on a semiconductor substrate. A silicon fin may be formed on the semiconductor substrate between the silicon source region and the silicon drain region. The silicon source region may be electrically connected to the silicon drain region by the silicon fin when the transistor is turned on. The silicon fin, the silicon source region, and the silicon drain region may protrude from a surface of the semiconductor substrate, and a gate electrode may cross over the silicon fin. In other words, the gate electrode may pass over both sidewalls of the silicon fin. Therefore, the channel region of the Fin FET can include both sidewalls of the silicon fin, and the gate electrode can control both sides of the channel region.
Despite the difficulties associated with higher integration density of semiconductor devices, improvements in operational performance may also be desired. For example, increasing the amount of on-current may contribute to reduced response time for the transistor. Because the channel region includes both sidewalls of the silicon fin, the Fin FET can generate adequate on-current. However, this advantage may be limited by the size to which the Fin FET may be reduced.